Pushing the limit of lithography for patterning two-dimensional lattices in III-V semiconductor quantum wells
Publication date
2021-04-08
Authors
Vergel, N. A.Franchina
Post, L Christiaan
Vaurette, F.
Lambert, Y.
Yarekha, D.
Coinon, C.
Fleury, G.
Kulmala, T. S.
Xu, T.
Desplanque, L.
Editors
Advisors
Supervisors
Document Type
Part of book
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taverne
Abstract
Building two-dimensional lattices in semiconductor quantum-wells offers the prospect to design distinct energy-momentum dispersions, including conical intersections and nondispersive bands. Here, we compare three lithographic patterning methods, e-beam lithography, block copolymer lithography and thermal scanning probe lithography to produce a honeycomb lattice in an In0.53Ga0.47As quantum well. We weigh up the pros and cons of each method to reach lattice constants smaller than 20 nm with a minimum of dispersion in the pore size.
Keywords
III-V semiconductors, Lithography, two-dimensional lattices, Taverne
Citation
Vergel, N A F, Post, C, Vaurette, F, Lambert, Y, Yarekha, D, Coinon, C, Fleury, G, Kulmala, T S, Xu, T, Desplanque, L, Wallart, X, Vanmaekelbergh, D, Delerue, C & Grandidier, B 2021, Pushing the limit of lithography for patterning two-dimensional lattices in III-V semiconductor quantum wells. in 2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). IEEE, pp. 1-3. https://doi.org/10.1109/EDTM50988.2021.9420884